HyperAccel at SC26
See LPU-powered inference in action
Explore an eight-LPU server system and see live LLM inference on operational servers in Korea.
- Exhibit dates
- November 17–19, 2026
- Venue
- McCormick Place, Chicago
- HyperAccel booth
- #1411 · AI Semiconductor Korea Pavilion
What you’ll see at Booth #1411
Eight-LPU server system
See how HyperAccel’s LLM Processing Units integrate into a server platform for data center and enterprise AI infrastructure.
Live LLM inference
Watch LLM inference run on operational servers deployed in HyperAccel’s server room in Korea.
HyperAccel internal evaluation
System-level inference efficiency
HyperAccel’s LPU combines LPDDR5X memory with its Streamlined Dataflow architecture to make efficient use of memory bandwidth for LLM inference.
Approximate results from a HyperAccel internal comparison of four LPU PCIe accelerators and a host system versus an NVIDIA H200 SXM node. The eight-LPU server is the configuration on display at SC26.
Hear from HyperAccel at Lablup’s booth
AI infrastructure presentation
Wednesday, November 18 · 2:30–2:45 p.m. CT
Lablup Inc. · Booth #4630
Booth #1411 · November 17–19
Meet the HyperAccel team
Talk with us about server integration, technical validation, or deploying LPU-based inference in your infrastructure.